Statistical Arbitrage

whitepaper for statistical arbitrage with fpgas
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Most algorithmic trading systems based on statistical arbitrage rely on executing the algorithm in a server system usually specially written low latency code so that the algorithm can touch the market in front of other traders.

There have been significant advances, both in software architectures for minimising latency caused by cpu cache misses, thread wakeups, and data copying. In addition, there has been a growing trend to push functionality down into the hardware. Typically, the network protocol decoding is carried out in the Network Interface Card (NIC) so that the software doesnt need to spend time decoding the network protocols. This has extended from just TCP/IP decoding to full Market Feed protocol decoding.

However, it is still necessary to feed the market data into the server, have it processed by the software algorithm and then have the software place a market order. Despite all of the cpu and software architecture advances, the server side processing is still the slowest part of the system.

Diagram showing partial solution for hardware fpga trading appliance

The data must be marshalled across the server bus, the thread has to be waiting, instructions will be executed sequentially by the CPU (or if multithreaded, some delays will occur in synchronising the result set). Then the resultant order must be marshalled back over the server bus to the NIC where it can be encoded and transmitted to the exchange. With all this marshalling, threading, drivers, instruction execution, it is no wonder that the end to end response time is in the order of 100s of microseconds.

The Cheetah-Solution:

Imagine if you could reduce that response time to less than 1 microsecond.

You can build such a system with components from Cheetah Solutions. Your system would directly process market ticks from the network, run them through our Cheetah Blocks to extract and compare technical indicators against benchmarks, and place orders in realtime in hardware. Your software system would then simply be taking a supervisory role, applying limits, checking results, and steering the hardware.

Cheetah solutions IP Cores imbedded into an fpga trading applicance for statistical arbitrage

You have free reign to decide what algorithms to use. You develop the pricer, trader, and position keeper components based on our Cheetah Blocks and Cheetah Cub IP Libraries.

By adopting the Cheetah Framework, you will be able to take advantage of easily expanding your solution as we bring IP Cores for additional technical indicators to market, or use our Cheetah Cub IP to build your own custom indicators that slot right in.



Copyright(c) 2016 Cheetah Solutions Pty Ltd

Patent Pending 61739845